Broadband-phase r.-c. network



May 16, 1961 l. H. Gl-:RKS

BROADBAND-PHASE R.c. NETWORK 3 Sheets-Sheet 1 Filed May 18, 1959 INVENTOR.

lRvl/v H. G-ERKS mi2 wQ/MM AT'T'ORNEyS May 16, 1961 l. H. GERKS BROADBAND-PHASE R .-c. NETWORK 3 Sheets-Sheet 2 Filed May 18, 1959 llllawwlll :VOZPWH wah... 0zoomm Ox mnh... .mwzu

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May 16, 1951 l. H. GERKs v 2,984,799

BROADBAND-PHASE R.c. NETWORK Filed May 18, 1959 5 Sheets-Sheet 5 INVENTOR. /Rvuv H. GERKs WMM/MMA# ATTOR N E y-S United States Patent O BROADBAND-PHASE R.C. NETWORK Irvin H. Gerks, Cedar Rapids, Iowa, assignor tu Collins Rfalio Company, Cedar Rapids, Iowa, a corporation o owa Filed May 18, 1959, Ser. No. 813,728

6 Claims. (Cl. 333-29) This invention is related to a circuit capable of phaseshifting a signal within a broad frequency range by 90 without any tuning adjustment and without the use of inductive components. In particular, it is related to circuits which provide a pair of outputs, wherein a fixed 90 degree phase relationship is maintained between the outputs, although their frequency varies over a very large range, which may be of the order of many octaves.

Many types of phase-shift circuits are known in the prior art. Some are known which can provide a phase shift of 90 within moderate tolerances over a significant frequency range. However, none is known in the prior art which can obtain a phase shift fixed at 90 over a theoretically infinite range of frequencies. This can be obtained theoretically by the invention, although there is some variation in the relative amplitudes of its two outputs; in fact, the ratio of the two amplitudes approaches zero at the limits of an intinite frequency range. By the proper choice of parameters in the invention, equality of the two amplitudes can be maintained within close tolerances over a large frequency range. Also, the amplitude of each output is independent of frequency within similar close tolerances. When even small inequality of output amplitudes must be avoided, amplitude control means is available in the art which can maintain equality of amplitudes. For example, an automatic gain control system using amplitude comparators can be used to control relative amplitudes.

Many phase-shift circuits in the prior art which are capable of operating over moderate frequency ranges require inductive components. Inductive components are generally bulky, and necessary precision of winding inductances for such circuits makes their cost high.

It is therefore an object of this invention to provide a circuit which can theoretically maintain a fixed 90 degree phase relationship between two voltages derived from a single source over a theoretically infinite frequency range, while using only resistive and capacitive components.

It is another object of this invention to provide a broadband phase-shift network which can be economically constructed without the necessity for bulky and expensive inductive components.

It is. another object of this invention to provide a wideband phase-shift circuit which can be used in:

(A) Phase-type single-sideband generators.

(B) Antenna arrays for obtaining a xed pattern over a large frequency range.

(C) Wideband mixers for deriving a range of frequencies with relatively pure wave shape from a precision crystal oscillator.

(D) Wideband demodulators for suppressing image response in single-conversion superheterodyne receivers.

(E) Multi-phase power supplies for driving alternating-current motors over a wide range of frequency.

(F) Applications wherein the 90 degree phase relation between two signals established in a servo-loop with the aid of a phase detector must be neutralized to permit adding the signals.

(G) Instrumental applications typilied by a circuit for generating a circular sweep on an oscilloscope screen over a wide range of frequencies.

The present invention uses as components a pair of relatively narrow-band phase-shift circuits found in the prior art. The first type of prior phase-shift network is disclosed in Electronics, December 1946, page 112, Figure 1 (C). The second type of prior network is disclosed in The Radio Amateurs Handbook of the Amateur Radio Relay League, thirty-fifth edition, pp. 310-311, Figures 11-5 and 11-6. Neither of these prior phase-shift circuits can theoretically obtain a lixed 90 degree phase shift over even a small frequency range. That is, the phase shift will vary theoretically to some extent over any frequency range however small, although the phase variations can be maintained in practice within preassigned tolerances over a moderate frequency range, such as approximately ile' over a l0-to-l frequency range.

The invention teaches how these imperfect prior circuits may be combined in a unique manner to provide a circuit which can provide a fixed 90 degree phase shift which theoretically can be maintained over an indefinitely wide frequency range.

Further objects, features, and advantages of this invention will become apparent to a person skilled in the art upon further study of the specification and the accompanying drawings, in which:

Figure l represents a general diagram of the invention;

Figure 2 illustrates the vectorial voltage combinations found in the invention to obtain its output voltages;

Figure 3 shows a schematic of component circuits used in the invention;

Figures 4 and 5 illustrate phase iiuctuation with frequency change found in prior networks used as component parts of the invention; and

Figure 6 illustrates the constant phase with frequency variation found with the invention.

Reference should be made to the drawings for a more detailed explanation of the invention. Figure 1 is first considered. It includes a first type of network 10 which has components connected in the manner given by the previously-cited reference in Electronics Further, it includes a second type of network 20, which has components connected in the manner found in the previouslynamed citation in The Radio Amateurs Handbook.

A general application of the prior circuits providing networks 10 and 20 as taught in the cited references will not provide the iixed phase relations obtainable with the present invention. Two additional teachings are made by this invention to achieve its fixed-phase relations, and

s both must be satisfied. VThey are:

(l) The outputs of the prior circuits must be combined in the manner taught herein; and

(2) The components in both prior circuits must be proportioned in the particular manner taught herein.

The inputs to networks 10 and 20 are obtained from a source which provides a pair of oppositely phased voltages E and -E, which have equal magnitudes and a frequency f. These voltages are provided at terminals 7 and 8 with respect to ground or any common potential level. Any of many known types of 180 degree phasesplitting circuits can provide input voltages E and -E.

Network 10 has inputs connected directly to terminals 7 and 8. But network 20 has one input connected between terminal 7 and ground and has another input connected between ground and a point 9 on a voltage-divider network comprised of resistor R and etawhich produce a voltage ratio k. Thus the voltage at point 9 is a fraction k of the input voltage E received at terminal 8 and is thus kE.

First type network 10 provides a pair of output voltages V1 and W1 with respect to ground or any other common potential level. The phase p1 between voltages V1 and W1 varies with frequency in the manner shown by curve 11 in Figure 4.

On the other hand, second type network 20 provides output voltages V2 and W2 with respect to ground. The phase :p2 between voltages V2 and W2 varies in the manner shown by curve 12 in Figure 5.

I have discovered how the networks 10 and 20 can be interrelated so that respective phase deviations from 90 of 451 and (p2 may be made equal in magnitude and opposite in sign, and how the outputs of networks 10 and 20 can be combined so that thephase errors cancel and a pair of output voltages Ev and WW maintain a iiXed 90 degree phase difference without regard to frequency, subject only to the limitation that the magnitude of Ev and EW become progressively more unbalanced as' the frequency deviates more and more widely from the design center valve.

A pair of adder circuits 13 and 14 have inputs which are directly connected o r can be cross-connected to outputs from networks 10 and 20. Adder circuits 13- and 14 vectorialrly combine their inputs in resistive networksrto provide output voltages EV and EQ. Thus adder 13 sums equal-magnitudevoltagesV1 and V2 (or W1) to provide output Ev. Similarly, adder 14 sums the equal-v magnitude voltage W1 (orrV12) and W2 to providev output EW.

Figure 2 is avector diagram illustrating the manner in which the outputvoltages of networks 10 and 20 are combined to produce the adder output voltagesEv and Ew. The geometrical proof that voltagesEv and EW are always 90% apart follows: angle A represents the error by which the angle between V1 and V2 is less than 90 andalso` by whichpthe angle between W1 and W2 is greater thanv 90. 'I'his common aspectA of error angle A and also the fact that V1 and W1 coincide are attributesof the invention and will be proven later.

The voltages V1 and V2 are equal in magnitude. Thus their vector sum. Ev is represented by a vector which bisects the angle 1 between V1 and V2. Hence,

kloof-A.)

Similarly, W1 and W2 are'equal in magnitude, and the vector representing their sum bisects the angle p2 between them, so that which is the angle between voltages Ev and WW. It is apparent that these voltages remain 90 apart regardless of the amount of the error anglerA as long as this-error magnitude varies somewhat with frequency. On the other hand in each component network, 10 or 20, the magnitudes of their output voltages are constant and the phase angle between the two voltages from one network varies with frequency. Since an unbalance of voltage magnitudes can be readily corrected by means well-known in the art, the advantage provided by this invention of holding the phase angle independent of frequency is unique and indispensable. Since the phase error A can be held to moderate values over a wide range of frequencies by the proper design of the component networks 10 and 20, the voltage unbalance between the two adder outputs Ev and EW can also be held to a modest value over a wide frequency range. Thusl far, there has been no teaching of how networks 10 and 20 may be constructed in order to maintain the errors in their output angles 1 and 2 equal in magnitude but opposite in sign, which is a condition for maintaining the required common value of error angle A. Before this can be done, it is necessary that networks 10 and 20 be considered individually and in great detail. Reference is made to Figure 3 for this purpose.

In Figure 3, one well-known form of phase-splitter 30 is illustrated which serves the purpose of deriving voltages E and -E from an input signal provided at a single-ended input terminal 31. Equal resistors 33 and 34 are con nected serially to the plate and cathode of a tube 32 betweena direct-current source (B+) and ground. The oppositely-phased voltages E and -E are provided from the cathode and plate of tube 32 through equal capacitors 37 and 36 to terminals 7 and 8 respectively. The time constants of respective capacitorresistor circuits are chosen to avoid any signicant deviation from of the phase angle between voltages -E and -E over the required frequency range.

I. FIRST TYPE NETWORK (A) Structure and general analysis First type network 10 comprises resistors R1-R6 and capacitors C1-C6, all found within the broken line conning network 10 in Figure 3. It includes two branches each containing a pair of circuits in series between terminals 7 and 8. The rst branch contains parallel items R1 and C1 in series with R3 and C3. The second branch contains parallel items R4 and C4 in series with items R6 and C6. The comparable items in the two branches are oppositely connected between terminals 7` and 8. Also parallel items R2 and C2 are connected between ground and a point 11 on the first branch; and parallel items R5 and C5 are connected between ground anda point 12 on the second branch. Component output voltages V1 and W1 of network 10 are taken between ground and respective points 11 and 12. Phase angle p1 exists between V1 and W1.

By substitution, (1) becomes RaGi-l- BiXa- 1 +.7'(R3Br GiXa) than that of EW whenthe error angle `A has thedirection. 0

indicated. In this circuit, thephase angle between the output voltages E., and EW is constant and their relative It is necessary to impose conditions so that the absolute valueof voltage ratio V1/E is independent of frequency. The rst of these conditions is G1/G2=B1/.B2l Now (121) becomes G1 R2 kA Gti-G2 Ri'iRz (7) n n X1: R1 Cs y1=wC1R31/QC3R1 The two conditions, (3) and (5) become R2/R1=C1/C2 R2 a n) RVi-R2 1 2X1 l 2 R1+s (11) The voltage ratio becomes L 1X1*J'y1 E 2131+711; (12) lIn a similar manner, we may obtain m: 1-X1-1'y1 E B1-X2+1n (13) where R5 Wm 14) f n n a1 R4+ C6 15) y2=wC4R51/L0C6R4 The conditions which must be imposed to make the magnitude of the voltage ratio independent of frequency are R5/R1= C.1/C5 (17) R1 n n RHF R5=12X2-1 2 R4 C6 (is) The last two equations are analogous to and (ll). We can make V1 and W1 equal in magnitude and independent of frequency by letting k=kA=kB (19) 55 This leads to the further condition R2/R1=R5/R4 (20) As a result, We also get X1=Xa (21) 60 The phase angle between output and input voltages V1 and E is 6 We may obtain .han 2;: (1 X1)+1/1y2 dip; 2 l-Xl if@ l-Xl (26) dw (1-X1)2+y12 dw (1- X1)2+ y1 do For the sake of simplicity, the following are defined:

A11.=R1C:a (27) BB=RSC1 (28) CB=R4C (29) Da=R8C4 R3 C1 FaI=1-X1'=1 -I+z) (31) With this substitution, we have y1=oBa-l/wei (32) y2=wD111/11Ca (33) @2522+ (wBal/wAs) (wD- l/wC) ta 2 F wB-wD-1/@A+1/w0) (34) d1 2F[ 111+ 1/1201 31+ 1/12141 1 dw a FEZ-i-(wDn-l/wcay Fa2{(coBa-1/wA)Z (35) (B) General parametric analysis for first type network If @b1 is assumed to be xed, then Equation 34 become a fourth-degree equation in w. yIt has at most four real roots. These correspond to the four possible values of frequency at which the assumed value of 1p1 (i.e., a design value 45111) is obtained. A curve of Q51 versus w (which is 211-1) should have two maxima and one minimum, or two minima and one maximum (see Figure 4). At minimum and maximum points on the curve d1/dw==0. If (35) is set equal to zero, a third-degree equation in o2 results. The three positive roots in w correspond to the three constant-phase points mentioned. One of these roots, wo, comes at the geometric center of the useful band. The other two are symmetrically spaced about this midband frequency. We assume that the phase error at the band center is of one sign, and that the error at the other two constant-phase points is equal in magnitude to that at midband but opposite in sign. In this way, equal positive and negative errors result, and thereby rst type network 10 is adapted to this invention.

The midband angular frequency wo is most easily found by setting (26) equal to zero and noting that the equation is satisfied when y2=y1 and dy2/dw=dy1/dw That is,

Simultaneous solution of (36) and (37) yields w02=1/B1C =1/A1,Da (38) The positive roots of (40) correspond to the other two constant-phase points on the curve. Let the smaller of the roots be designated w1.

(w1/w0)2=1/2 (N\/N2-4) (41) where The next step is to substitute wo in (34), nd the corresponding value of (b1, then substitute w1 and again iind the corresponding value of (1&1. The design value of p1 (=bA1) is chosen midway between these two values. Equation 34 may irst be converted to the form tan c (cd/ow (N+ 4) (w/w0)2+ 1 (43) 10 10F s (A- Us) (cv/@M1 -l- (4v/w02] The phase angle p1 at midband (designated 4:01) is obtained by setting w/wo equal to l.:

tain (#01 mrtma- C.)

The phase angle 4&1 at the other two constant-phase points (designated (pm or (151,1) is obtained by substituting It is convenient to use the ratio (v1/wo as an intermediate design parameter, and for this purpose it is designated Equation 53 may now be solved for Qa:

Thus, a and therefore (CIA)a are functions only of the 75 bandwidth parameter X. In (56), the minus sign is to be used for positive values of (bm and thevr plus sign for negative values of pm.

A solution may now be carried out for the circuit parameters, but the design is not yet optimum. It is still necessary to apply one more initial requirement. This is the maximizing of the voltage ratio k. The simplest procedure is to assume a value for the parameter C., and solve for the rest:

We now assume a value for the circuit parameter R4 and begin solving for the others. The results are as follows:

In order that R6, C4, and C5 may be realizable, the quantity under the radical must be zero or positive. That is, (1- a)2 4(C/A)(l/cvoz). Since k=12(1-Fa) and k should be as large as possible (l-Fa) must be as small as possible. Hence (1-F)2=4(C/A)a(1/w02C2) (67) When (67) is solved simultaneously with (61), the result is Qa (A/Ch-l This specifies a unique value for Ca. 'I'lle corresponding value of k is found to be Hence, for A1=i90, k is solely a function of the bandwidth parameter X.

(C) Fnal parametric analysis of rst type network Equations 62-66 now become essere@ Since [the two sides of the network are wholly independent, another circuit parameter :may be chosen arbitrarily.

It is usually convenient to let R1=R4. Then R2=R5, Ra=Re, C1=(A/C)aC4, Cz=(/C)aC5, C3=(A/C)aCs The maximum deviation from the desired phase angle taken at midband is (45D) m: arctan Q For the case where tbm has the desired value of i90", the deviation is given by Again, this is a function solely of the bandwidth parameter X. For computational purposes, (43) may be written am g: st/Q.,

When (83) is written as a polynomial in w, we get remains (w/w)2(S1-2) (w/wn) +1=0 (85) The solution of this equation yields reciprocal roots which I define the edges of the useful rband. The lower one of these is given by It is seen that the bandwidth of network 10 is a unique function of X and that the use of X as a design parameter is justified, Figure 4 illustrates how X is related to the bandwidth in a typical instance.

II. SECOND TYPE NETWORK (A) Structure and general analysis Second type network 20 comprises resistors R1-R4 and capacitors C1-'C4. These components are all found within the broken line surrounding network 20. Network 20 includes two branches connected similarly between terminals 7 and 9. A first branch comprises parallel items R1 and C1 in series with items C2 and R2. A second branch comprises parallel items R4 and C4 in series with items R3 and C3. Component output voltages V2 and W2 of network 20 are taken between ground and points 21 and 22 of the respective branches. Phase angle p2 exists between voltages V2 and W2. A Y

The procedure is similar to that used with network 10 in deriving equations for network 20, wherein the quantities X1, X2, Y1 and Y2 are defined for comparable components of the branches of network 20 in the same manner as they are defined for the branches of network 10 by Equations 8, 9, l5 and 16. We obtain rst for network 20:

The magnitude of each output voltage, V2 or W2, is independent of frequency and is equal to kE. The phase angles of Vg/E and Wz/E are 0v2= -2 aretan l 1 X1 (97) 11/2 0,2- 2 arctan 1 X1 (98) 'Ihe phase difference is 1 1. We now have AD=R1C2 (102) It is seen that Equation 110 is identical with (35) for rst type network 10. Furthermore, Equation 109 may be compared with (34) to show that the right member of one is the negative reciprocal of the right member of the other. This allows shortening the parametric analysis.

(B) General parametric analysis for second type network In the same manner as with network 10, we obtain for network 20:

w02=1/BbCb=1/ADb (111) We thus obtain the design condition R2R4C1C3=R1R3C2C4:1/w02 'Equations 40, 41 and 42 thus apply also to network 20. In the following, angle 1502 designates the value of p2 at midband (where (p2 is a minimum), and pa2 or (hb2 designates the value of p2 at the other constant-phase points (where p2 is a maximum), as shown in Figure 5. Equations 43, 44, and 45 may be applied to the second type network provided that tan 9-1 2 is replaced by -eot Hence, for network Z It is now found that Equations 46-57 are applicable to network 20 when the appropriate change of subscript is made. Thus all the basic parametric equations are the same for networks 10 and 20. Thus from (54) it is seen that QbciW/Svs'z (l1/la) I'f we now assume that Cb and Rg are known as before, we obtain the following equations for several of the circuit parameters:

In order that R3 and C4 may be realizable, the quantity under the radical must be zero or positive, i.e.,

(Fb-1)2 4(C/A)b(1/w020b2) 1g Since and k should be yas large as possible, (Fb-1) must be as small as possible. Hence (Fb-1)2=4(C/A)b(lw02Cb2) (118) Equations 58-61 may be applied with a suitable change of subscript, provided that wo is the same for the two networks. We now solve (118) and (61) simultaneously:

(119) This identifies a unique value for Cb. It is found that k is given again by Equation 69. The voltage ratio k must of course, be the same for the two networks, since the invention requires that the two component networks have equal output voltages.

(C) Final parametric analysis of second type network Equations 11S-117 now become 1 -k Ra: R4 4 (120) C3=Cb/R4 (116) d0 Cb 1-k CFE (Tk (121) On the other side of the network, we may arbitrarily assume R1. The remaining circuit parameters are then found to be It is usually convenient to let R1=R4. Then R2=R3,

C2= boa, 01:(-5 brC4 The maximum deviation of p2 from the desired value Az S Y :m2-ibm: QE QB (451111, 2 arctan S1 arctan Y S2) (127) :arctan %-arctan (12711) E@ 2 .l

. i3 se that Srl- S2 For the case where 2=i90, as required by the invention, Equation 128 becomes III. THE COMBINATION OF THE FIRST AND SECOND NETWORKS Each prior network has phase variations within its bandwidth, as can be seen from Figures 4 and 5. However, through the appropriate combination of the output voltages of two properly proportioned component networks by ymeans of adders, these phase variations are eliminated.

The form of adder circuit indicated as 13 or 14 in Figure 3 is preferable to the form shown in Figure 1, because the resistive networks tend to load the phase-shift networks 10 or 20 and no provision is made in the design for such loading. 'Ihus in Figure 3, each adder 13 or 14 is a pair of triodes connected as cathode followers and having a common load resistor 43 or 53. In adder 13, the grids of tubes 41 and 42 are connected to voltage outputs V1 and V2 respectively of networks 10 `and 20. Likewise in adder 14, the grids of tubes 51 and 52 are connected to voltage outputs W1 and W2 respectively of networks 10 and 20. The nal outputs E(7 and Ew, having a constant 90 degree phase diiference regardless of frequency, are taken across respective load resistors 43 -and 53.

Since it is necessary for the invention that the phase error pD)a and (D)b be equal but of opposite sign in the two types of network, it is seen by comparing (82) and (128) that Qb=Qa (129) Thus, the rule for signs given after Equation 54 must Vbe reversed for network 20. At the same time, the rule for signs following Equation 6 must be reversed, so that For computational purposes, Equation 109 may be written Inspectionof (83) and (131) shows that, in view of (129), the angle p/2 varies symmetrically in opposite directions from 45 for networks 10 and 20. The bandwidth Equations 86-90 must apply similarly to network ,20, as may be appreciated from an inspection of Figures 4 and 5. Thus, the inventive combination requires that the parameter k be the same for both networks 10 and 20 and that the ratio (A/C),1 and (f1/C),J be reciprocally related. Once k, A/C and C have been found for each network from the expressions in Sections I and II, any two of the resistors and capacitors in each network 10 or 20 may be assumed and the remaining parameters calculated from Equations 70-78 for network 10 and from Equations 120-124 for network 20.

The procedure which follows completes the proof, begun earlier in the discussion of Figure 2, that the phase diierence between output voltages Ev vand EW remains constant as the common error angle A varies. First, the phase angles 0 for the output voltages V1, W1, V2 and W3 of networks 10 and 20 with respect to input voltage E are expressed in terms of system parameters, and then it is `shown that the summations by adder circuits 13 and 14 give the constant 90 degree phase difference. LThe param- 14 eters Qa and (Cf/A),l for network 10 and Q1, and (CA/b for network 20 are defined similarly, as stated earlier after Equation 114.

The rst step is to derive the expressions for the phase angles 0v1, 01,2, 0w1, and @wz measured with respect to input voltage E, for the voltages V1, V2, W1 and W1 at the outputs of networks 10 and 20.

(A) Network 10 The angles @v1 and 9W1 are the respective phase angles between the voltages V1, W1 and the input voltage E.

From (22) (B) Network 20 The angles @v1 and @W2 are the respectively phase angles between the voltages V2, W1 and the input voltage E.

From (97) en y1 2 arctan 1 I X1 From (98) @En y2 2 aretan 1+X1 Hence,

tan ve: y1 (1/wb)wBb (l/wAb) Lv/0020s 2 1 X1 Fb Fb (184) wsop-en 0/A b- (www waabcbn (oJ/a) (aan) (ma) Qb "CbFb (f1/@F1 Substitute this in (13411) and (135e):

It has been shown previously that networks and 20 must be designed so that (See Equations 129, 130.) When these replacements are made in (134b) and (135k), we get that one is the negative reciprocal of the other. This means that @V1/2 and Hwa/2 differ by 90, or that HV1 and 6m diier by 180. Comparison of Equations (133b) and (134C) shows them to be identical. Hence @v2 and 6m are equal. This conlrms the construction of Figure 2, in which vectors V1 and W2 are drawn 180 apart, and vectors V2 and W1 are drawn coincident. As explained earlier in this disclosure, the phase relations displayed in Figure 2 insure that the voltages Ev and Ew are always 90 out of phase.

Inspection of Figure 2 shows that The angles 01 and 02 may be determined from (83) and (131) respectively. If in (131) Qb is replaced by -Qm the two equations give reciprocal results for the halfangles. This is consistent with (136) and (1137):

2 1: am): o E tan 2 tan 45 2 cot 45 +2 cot 2 (138) Equation (138) can be solved for 156 The maximum value i A is most easily determined by setting w/w0=1, QB=\/S1S2 in (140) and reversing the sign to give a positive value:

which is the same result obtained for the absolutey magnitude of tan qD (see Equation 82a).

Since the vectors V1, V2, W1 and W2 in Figure 2 are all the same length, it is a simple matter to derive an expression for the voltage unbalance between EvV and Ew. When Ev=E=\/i/1 In the general case depicted in Figure 2,

:r/,(608 -sm (145) The ratio of the larger to the smaller output voltagey is A cos -Z--l-sm 2 eos -sin ---#l-t n (146) with the help of (141), we fmd the maximum unb'alance within the band:

Pfr ,/l. (Ew)mux S2 In terms of the bandwidth parameter X, this becomes @v 1 X4+6X2+1 y (Ew m..2)/ X3+X"' (148) As the bandwidth approaches zero, X approaches 1, and (Ev/Ew) max approaches 1.

For small values of A, Equations (144) and (145) may be approximated as follows:

These equations show that amplitude variations in E(r or Ew have the essentially same dependence upon frelmm (68);

` from y (56):

' Fiamma):

1 7 quency as A, rwhich in turn varies in the same manner as Hence, the nature of the variation of the magnitude of the output voltage, Ev or Ew, is shown in Figure 4 or Figure 5.

When the input voltage is sinusoidal, an automatic amplitude regulation scheme may be incorporated in the invention to hold the output voltages Ev and Ew constant. The regulating circuit is readily made aperiodic, so that essentially constant voltages are obtained at all frequencies. The most familiar example of such regulation is the automatic gain control incorporated in most radio receivers and in some audio amplifiers. When the input voltage is complex, as in the case of wide-band speech or musical signals, simple automatic amplitude regulation is not practical. If great stability of output voltage balance is required in such a case, a more complex network of resistors and reactors is required than that shown as 10 or 20 in-Figure 3.

To. illustrate the foregoing derivations, assume that an lembodiment ofthe invention is required to cover a frequency range of 100 c.p.s. to 10,000 c.p.s. and to produce two quadrature voltages of equal and constant amplitude (as nearly as possible without automatic amplitude regulation). Let Ev lead Ew, so that bA=90.

FOR NETWORK 10 From (89):

From (51) or (88): S14- 12.1 From (52) 82:8.9888 From (49) or (S-1): l=18.2 From (54): Q=\/S1S2:l0.429 From (57): a:5.8742 From (56): (C/A)a:(a/2)-\/(a/2)2-l:0.l755; (A/C)a:5.6987

Now let R1:Rr:l0,000 ohms. Then from Equations 70-78, the circuit parameters for network 10 are found to be:

Ohms Microfarads R1:10,000 C1:0.0380 R2: 8,245 C2:0.0461 R3: 1,370 C3:0.2773 R4=l0',000 04:0;00667 R5:8,245 05:0.00809 Re=1,370 (36:0.0487

From (8l): (D):829'. This is the maximum departure of the phase angle between V1 and W1 from 90.

FOR NETWORK 20 Z, X, S1, S2', N, Q2, and a remain as before. ff

wocb=7-874 Cb=woCb/w0=7.874/(21rX 1000) =l.2532X 10'3 From (69) k:0.4519 From (125): R1C1=R2C2=6.668 X 10-5 From. I R3C3=R4C4=3.800X10 4 Again let R1=R4= 10,000 ohms. Then from Equations 1Z0-124, the circuit parameters for network 20 are found to be: 1

Ohms Microfarads R1: 10,000 C1:0.00667 R,=3,032 02:0.0220 R3:3,032 C3:0.l253 R4:10,00O @1:00380 The maximum phase deviation (-D)b is the same as for network 10 (see Equation 127). This is also the maximum value of the angle A shown in Figure 2 (see Equation 142).

From (147): (Ev/Ew)max=l.l602.

Although this invention has been described with respect to particular embodiments thereof, it is not to be so limited, as changes and modifications may be made therein which are within the full intended scope of the invention as defined by the appended claims.

What we claim is:

l. A broad-band resistance-capacitance phase-shift network, comprising la first-type network, having first and second input terminals, and rst and second outputs, a first resistance and a first capacitance connected in parallel between said first input terminal and said first output, a second resistance and capacitance connected in parallel between ground and said first output, third resistance and capacitance connected in series between said first output, and said second input terminal, a fourth resistance and capacitance connected in parallel between said second output and said second input terminal, a fifth resistance and capacitance connected in parallel between ground and said second output, a sixth resistance and capacitance connected in series between said second output and said first input terminal; a second-type network having first and second inputs, and first and second outputs, said first input being connected to said first input terminal, a reisistive voltage divider connected between said second input and said second input terminal, said voltage divider providing an attenuated voltage to said second-type network, a first capacitance and resistance connected in parallel between said first output and said second input, a second resistance and capacitance connected in series between said first output and said first input terminal, a third resistance and capacitance connected in series between said second output and said first input terminal, a fourth resistance land capacitance connected in parallel between said second output terminal and said second input; a first voltage combiner having a pair of inputs and an output, with said combiner inputs being respectively connected to the first outputs of said first and second type networks; a second voltage combiner having 'a pair of inputs and an output; the inputs of said second combiner being respectively connected to the second outputs of said first and second type networks, and the outputs of siad first and second combiners being capable of providing voltages phased by 2. A network as defined in claim 1, in which said voltage divider comprises a pair of resistors connected in series between ground and said second input terminal, a point between said resistors being connected to said second input of said second-type network, said pair of resistors having a ratio of 3. A network as defined in claim 2, comprising a phasesplitter receiving an input signal, said phase-splitter having a pair of outputs providing voltages of equal magnitude and opposite phase, the outputs of said phase-splitter being connected to said first and second input terminals.

4. A network, as defined in claim 2, in which said first through sixth resistances for said first network are R1, R2, R3, R4, R5 and Re respectively, and its first through sixth capacitances are C1, C2, C3, C4, C5 and C5, respecessere@ 5. A network, as defined in claim 2, in which said first and second-type networks each have center frequency wo and have a respective minimum or maximum frequency w1, said circuits being defined in terms of the ratio with the assistance of the following parameters S1, S2, and Q, a and A k, Ca and Cb, which are dened as follows:

The rst through sixth resistances of said first-type network being R1, R2, R3, R4, R `and R6, and its rst through sixth capacitances being C1, C2, C3, C4, C5 and C6, with the values of R1 and R4 being given, and the values of the remaining resistances Aand capacitances of said rst-type network being:

k RF C',a A @Fn e),

Mig-ke are) R5 Rte-'6) C@ e fr-re C5: Co[ (1 303] cec-1%;

The iirst through fourth vresistances for the second-type network being R1, R2, R3, and R4, respectively, and its rst through fourth capacitanees being C1, C2, C3, Iand C4 respectively, the values of R1 and R4 being given for the second-type network, its other resistances and capacitances having the following values:

nl Cs R4 6. A network as dened in claim S in which for the first-type network R1=Ra and for the second type network:

eferenees Cited in the le of this patenti UNITED STATES PATENTS 2,529,117 Tompkins Nov. 7'., 1950 2,559,662 Rheingold. et al. July 10, 1951 2,763,830 Pihl n. Sept. 18, 1956 

